1. Field of the Invention
The present invention relates to the Universal Serial Bus (USB) protocol. In particular, the invention relates to the control of versatile USB endpoints.
2. Description of the Related Art
Universal Serial Bus (USB) is a standard peripheral interface for attaching personal computers to a wide variety of devices: e.g., digital telephone lines, monitors, modems, mice, printers, scanners, game controllers, keyboards, and other peripherals. The USB thus replaces existing interfaces such as the RS-232C serial ports, parallel ports, PS/2 interfaces, and game/MIDI ports.
In accordance with USB, all attached devices connect to a personal computer through a single connector type using a tiered-star topology. A host personal computer includes a single USB controller. The host controller provides the interface between the USB network and the host personal computer. The host controller controls all accesses to USB resources and monitors the bus""s topology. A USB hub provides USB attachment points for USB devices.
A USB function is a USB device that is able to transmit and receive information on the bus. A function may have one, or more, configurations, each of which defines the interfaces that make up the device. Each interface, in turn, is made up of one or more endpoints.
An endpoint is the ultimate source, or sink, of data. An endpoint pipe provides for the movement of data between USB and memory, and completes the path between the USB host and the function endpoint.
Each endpoint is an addressable entity on USB and is required to respond to IN and OUT tokens from the USB host (typically a PC). IN tokens indicate that the host has requested to receive information from an endpoint, and OUT tokens indicate that the host is about to send information to an endpoint.
On detection of an IN token addressed to an endpoint, the endpoint is responsible for responding with a data packet. If the endpoint is currently stalled, a STALL handshake packet is sent. If the endpoint is enabled, but no data is present, a negative acknowledgment (NAK) handshake packet is sent.
Similarly, on detection of an OUT token addressed to an endpoint, the endpoint is responsible for receiving a data packet sent by the host and storing it in a buffer. If the endpoint pipe is currently stalled, at the end of the data transmission, a STALL handshake packet is sent. If the endpoint pipe is currently disabled, at the end of the data transmission, no handshake packet is sent. If the endpoint pipe is enabled, but no buffer is present in which to store the data, a NAK handshake packet is sent.
A disabled endpoint, or endpoints not currently mapped to an endpoint pipe do not respond to IN, OUT, or SETUP tokens.
A number of vendors have developed implementations of the USB standard. For example, Intel Corp. has released the 8xc3x97931Ax, 8xc3x97931Hx, 8xc3x97930Ax, and 8xc3x97930Hx devices.
However, these devices have a number of problems. They do not process the start-of-frame packets for isochronous data. There is a need for a device to do this so errors can be more easily detected.
They do not provide hardware support for data synchronization. There is a need to do this so that packet transmissions can be synchronized or delayed.
The required buffer size for isochronous data can vary greatly depending on the application. For example, telephony requires 8 bytes and video requires 960 bytes. The Intel devices each have a dedicated buffer for each endpoint. There is a need for a device which allows more flexibility in defining the buffering capabilities of endpoints.
The present invention addresses these and other problems by allowing synchronization of packets, providing a shared buffer, allowing clock control, and allowing packet transmission to be delayed.
According to one embodiment, an apparatus according to the present invention sends isochronous data from a USB endpoint to a USB host, and includes a buffer memory, a pointer memory, a pointer controller, a counter memory, a data processor, and a controller. The pointer controller stores in the pointer memory an address pointer corresponding to the buffer memory. The counter memory stores a counter value. The data processor generates a data packet in the buffer memory. The controller selectively increments the counter value until it equals the address pointer, then sends the data packet.
According to another embodiment, an apparatus according to the present invention sends isochronous data from a USB endpoint to a USB host, and includes a buffer memory, a data processor, a delay memory, a counter memory, and a controller. The data processor generates a data packet in the buffer memory. The delay memory stores a delay value corresponding to the data packet. The counter memory stores a counter value. The controller selectively increments the counter value until it equals the delay value, then sends the data packet.
According to yet another embodiment, an apparatus according to the present invention adjusts a USB bus clock frequency and includes a reference clock signal generator, a signal processor, and a controller. The reference clock signal generator generates a reference clock signal having a reference clock frequency. The signal processor is configured to receive a USB bus clock signal and detect its frequency. The controller is configured to compare the reference clock frequency and the USB bus clock frequency and to transmit a control signal to a USB host. The controller transmits a clock increase signal when the reference clock frequency is greater than the USB bus clock frequency, and a clock decrease signal when the reference clock frequency is less than the USB bus clock frequency.
According to another embodiment, an apparatus according to the present invention receives isochronous data at a USB endpoint from a USB host and includes a first memory, a second memory, a receiver, and a controller. The receiver sequentially receives a first data packets having a first sequence number and a second data packet having a second sequence number. The first memory stores the first data packet and the second memory stores the second data packet. The controller generates an interrupt if a difference between the first sequence number and the second sequence number is greater than three.
According to still another embodiment, an apparatus according to the present invention receives isochronous data at a USB endpoint from a USB host, and includes a buffer memory, a delay memory, a counter memory, a receiver, and a controller. The receiver receives a plurality of data packets and delay information corresponding to a specific data packet of the plurality. The delay memory stores the delay information. The counter memory stores a counter value. The controller selectively increments the counter value until it equals the delay value, then writes the data packet to the buffer memory.
According to yet another embodiment, an apparatus according to the present invention transmits isochronous data between a USB endpoint and a USB host, and includes a plurality of USB endpoints, a buffer memory, a plurality of control memories, and a controller. The plurality of endpoints are configured to communicate data with a USB host on a plurality of USB endpoint pipes. The buffer memory is shared among the endpoints and can store an isochronous data packet. Each control memory corresponds to one of the endpoints. The controller selects one of the endpoints, reads the associated control word, and communicates the data packet on an endpoint pipe corresponding to that endpoint.
According to another embodiment, a method according to the present invention sends isochronous data from a USB endpoint to a USB host, and includes the steps of generating a data packet, generating an address pointer, and incrementing a counter value until it equals the address pointer, then sending the data packet.
According to yet another embodiment, a method according to the present invention sends isochronous data from a USB endpoint to a USB host, and includes the steps of generating a data packet, generating a delay value, and incrementing a counter value until it equals the delay value, then sending the data packet.
According to still another embodiment, a method according to the present invention signals a USB bus clock frequency adjustment and includes the steps of generating a reference clock frequency, receiving a USB bus clock signal and detecting a USB bus clock frequency thereof, comparing the reference clock frequency and the USB bus clock frequency, transmitting a clock increase signal to a USB host if the reference clock frequency is greater than the USB bus clock frequency, and transmitting a clock decrease signal to said USB host if the reference clock frequency is less than the USB bus clock frequency.
According to another embodiment, a method according to the present invention receives isochronous data at a USB endpoint from a USB host, and includes the steps of receiving a first data packet having a first sequence number, sequentially receiving a second data packet having a second sequence number, and generating an interrupt if a difference between the first sequence number and the second sequence number is greater than three.
According to yet another embodiment, a method according to the present invention receives isochronous data at a USB endpoint from a USB host, and includes the steps of receiving a data packet, generating a delay value, and incrementing a counter value until the counter value is equal to the delay value, then writing the data packet to a buffer memory.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description and accompanying drawings which set forth illustrative embodiments in which the principles of the invention are utilized.